STB5600 gps rf front-end ic n one chip system to interface active antenna to st20gp1 microcontroller n complete receiver using novel dual conversion architecture with single if filter n minimum external components n compatible with gps l1 sps signal n internally stabilised power rails n cmos output levels n from 3.3 to 5.9v supply voltage n tqfp32 package description the STB5600, using stmicroelectronics hsb2, high speed bipolar technology, implements a global positioning system rf front-end. the chip provides down conversion from the gps (l1) signal at 1575 mhz via an if of 20mhz to an output frequency of 4mhz suitable for st20gp1 gps processor. it uses a single external reference oscillator to generate both rf local oscillator signals and the processor reference clock. ? pin connection (top view) august 1998 tqfp32 marking: STB5600 traceab. code assy code 1/10 .com .com .com .com 4 .com u datasheet
functional description the STB5600 gps front-end is fed with the signal from an active antenna, via a ceramic rf filter. the gain between the antenna element and the STB5600 is expected to be between 10db and 35db overall, made up of the antenna lna gain, the feeder loss, connector loss, and the ceramic filter loss. in order to use an off-the-shelf ceramic filter, conventionally 50 ohms single ended, a matching circuit is used. (see appendix a.1), which provides a 300 ohm differential drive to the STB5600. a similar circuit can be used to feed the lo signal if using the recommended low-cost oscillator circuit (appendix a.3). note that the STB5600 radio architecture and the oscillator described here are covered by various patents held by sgs-thomson and by others. the use of the circuits described in this data-sheet for any other purpose may infringe such patents. - rf section the differential input signal is amplified by the rf-amp and mixed with the oscillator signal amplified from the lo+,lo- inputs to generate a balanced 20.46mhz if signal. the lo buffer amplifier may be fed differential or single ended signals, at levels between -60dbm and -20dbm . - if section the 20mhz differential signal from the mixer is fed through an external lc filter to suppress undesirable signals and mixer products. the multi-stage high-sensitivity limiting amplifier is connected to a d-type latch clocked by an internally derived 16mhz clock.. the effect of sampling the 20mhz signal at 16mhz is to create a sub-sampling alias at 4mhz. this is fed to the output level-converters. - divider section the 80mhz oscillator signal may be provided single-ended or differentially to the high impedance 80mhz+, 80mhz- inputs. any unused inputs should be connected to gndlogic via a 1nf capacitor. the 80mhz signal is amplified, then divided by 5 to create the 16.368mhz clock required by the st20gp1 processor, also used to clock the output latch of the STB5600. - output section the output latch samples the 20.46mhz intermediate frequency at a 16.368mhz rate, performing the dual function of second downconversion and latching. the downconversion occurs by sub-sampling aliasing, such that the digital output represents a 4.096mhz centre frequency the output buffers perform level translation from the internal ecl levels to cmos compatible outputs referred to external ground. absolute maximum ratings symbol parameter value unit v cc dc supply voltage 5.9 v rf+, rf- rf input 8 dbm t j junction temperature 150 o c t stg storage temperature range -40 to 125 o c r thj-amb thermal resistance junction-ambient 80 o c/w STB5600 2/10 .com .com .com .com .com 4 .com u datasheet
pin configuration apply 5v at the ce, v ccrf ,v ccif ,v cclogic pins, apply 3 v at the v ccdriv e pin symbol typ. dc bias dexription external circuit 1 if1+ 3.6 v mixer output 1 see application circuit 2 if1- 3.6 v mixer output 2 see application circuit 3v ccrf 5 v rf power supply 100 nf to v eerf 4 rf+ 3.5 v rf input ac coupled 5 rf- 3.5 v rf input ac coupled 6v ccrf 5 v rf power supply 100 nf to veerf 7v eerf 2 v rf voltage reference 100 nf to vccrf 8 gndrf 0 v rf ground 9v ccrf 5 v rf power supply 100 nf to veerf 10 lo+ 3.5 v local oscillator input ac coupled 11 lo- 3.5 v local oscillator input ac coupled 12 v ccrf 5 v rf power supply 100 nf to veerf 13 v cclogic 5 v logic power supply 100 nf to veelogic 14 80 mhz+ 4 v 80 mhz clock input ac coupled 15 80 mhz- 4 v 80 mhz clock input ac coupled 16 v cclogic 5 v logic power supply 100 nf to veelogic 17 v eelogic 2 v logic voltage reference 100 nf to vcclogic 18 clock+ 0.3 v or 3 v 16 mhz clock cmos output 7 pf to gnd drive 19 not connected 20 gnd drive 0 v cmos drive ground 21 data 0.3 v or 3 v 4 mhz data cmos output 7 pf to gnd drive 22 gnd drive 0 v cmos drive ground 23 v ccdrive 3 v cmos drive power supply 24 ce 3 v chip enable 25 gnd 0 v substrate ground 26 gnd logic 0 v logic ground 27 gnd if 0 v if ground 28 v eeif 2 v if voltage reference 100 nf to vccif 29 v ccif 5 v if power supply 100 nf to veeif 30 if2- 4 v limiting amplifier input see application circuit 31 if2+ 4 v limiting amplifier input see application circuit 32 v ccif 5 v if power supply 100 nf to veeif STB5600 3/10 .com .com .com .com .com 4 .com u datasheet
electrical specification (v vccrf = 3.3 v ...5.9 v; v vccif = 3.3 v ...5.9 v; v vcc logic = 3.3 v ...5.9 v v vccdrive = 3 v; t a =25 o c unless otherwise specified) lna mixer symbol parameter note min. typ. max. unit i vccrf supply current vvccrf = 5 v 20 25 ma z in differential input impedance @ 1575 mhz ac coupled at rf+ rf- inputs 300 1 w pf z out differential output impedance @ 20 mhz ac coupled at if1+ if1- outputs 70 3 w pf g c voltage conversion gain r l >3k w ,p in = -80 dbm (v in =75 m vp on 300 w ) 35 db iip1 input compression point (1db) (see application circuit) -60 dbm nf noise figure 5 db f rf input signal frequency (l1) 1575 mhz f if output signal frequency 20 mhz lo input buffer symbol parameter note min. typ. max. unit z in differential input impedance @ 1555 mhz ac coupled at lo+ lo- inputs 300 1 w pf input signal level -60 -40 -20 dbm limiting amplifier symbol parameter note min. typ. max. unit i vccif supply current vvccif = 5 v 2.5 3.5 ma z in differential input impedance @ 20 mhz ac coupled at if2+ if2- inputs 15 k w b bandwidth 3db 5 80 mhz sens limiter sensitivity input signal @ 20 mhz ac coupled 100 m vp v inmax maximum input signal input signal @ 20 mhz ac coupled 0.5 vp clock input buffer symbol parameter note min. typ. max. unit i vcclogic supply current vvcc logic = 5 v 5 7 ma z in differential input impedance @ 80 mhz ac coupled at 8o mhz+ 80 mhz- inputs 8 2 k w pf input signal level @ 80 mhz ac coupled at 8o mhz+ 80 mhz- inputs 5100mvp n division ratio 5 STB5600 4/10 .com .com .com .com .com 4 .com u datasheet
electrical characteristics (continued) output section symbol parameter note min. typ. max. unit i vccdrive supply current v vccdrive =3v 8 ma v oh high output voltage vp = v vccdrive =3v vp-0.4 vp v v ol low output voltage vn = gnddrive vn vn+0.4 v t r rise time c load =7pf 6 ns t f fall time c load =7pf 2 ns application circuit a typical application circuit is shown in figure 1. the rf input from the antenna downlead is fed via a ceramic filter and matching circuit to the rf+,rf- pins. the external lna in the antenna should have between 10 and 35db of amplifier gain, so the noise measured in a one mhz bandwidth should be -114dbm for ktb in 1 mhz + 2db lna noise figure +10/35 db lna gain (net) total -102/ 77dbm at connector. allowing 2db for filter loss, -104/-79 is available at the matching circuit. fig. 1 typical application circuit STB5600 5/10 .com .com .com .com .com 4 .com u datasheet
a.1 matching network the matching circuit may be a 50 ohm / 300 ohm balun transformer (figure 2), but a more economical solution is a tuned match as shown below. a single 10nh inductor is optimal in cost, but may not meet the users tolerance requirements over spreads of silicon and pcb material, as it has only around 1pf tuning capacitance ( 2pf in series with 2pf inside the package). the first example (figure 3) increases the capacitance with a discrete capacitor, and uses a lower inductance value. both examples assume that the ceramic filter is dc blocking, both input to output, and output to ground. the second (figure 4) example allows optimum matching by rationing the capacitors appropriately to achieve voltage gain commensurate with the impedance translation. while it has a higher component count, it is the version most tolerant of component variations and board capacitance. fig. 2 matching network with balun fig. 3 matching network with two elements STB5600 6/10 .com .com .com .com .com 4 .com u datasheet
a.2 if filter the recommended if filter is shown in figure 5. the stop band of the filter is to reject the alias images around 12mhz, and around 28mhz, where it should have at least 15dbc rejection. note that the mixer output is low impedance, (70 ohms), and the if input is high impedance (15kohms), so considerable voltage gain is achieved in the impedance matching filter. the filter also sets the bandwidth of the receiver, using the load impedance with the l/c ratio to set the filter q. if desired, an external resistor may be added in parallel to reduce the q. note that the bandwidth must be much wider than the 2mhz needed to pass the power of the gps signal... it must maintain linear phase across the 2mhz, even at the extremes of component tolerance. fig. 4 matching network with four elements fig. 5 if filter STB5600 7/10 .com .com .com .com .com 4 .com u datasheet
a.3 reference oscillator the recommended dual output oscillator shown in figure 6 generates both the 81.84mhz signal that is divided down for the cpu 16.368mhz clock, but also the low amplitude 1555mhz first local oscillator signal . note that some 2 volts of the 82mhz signal is available, and the capacitive tap on the tank circuit is used to reduce the amplitude to prevent excessive radiation. note that the transistor must be a high frequency type, ft of 8 ghz or greater, and that the collector inductor must have a self resonant frequency of 2.5ghz or higher. fig. 6 reference oscillator STB5600 8/10 .com .com .com .com .com 4 .com u datasheet
dim. mm inch min. typ. max. min. typ. max. a 1.60 0.063 a1 0.05 0.15 0.002 0.006 a2 1.35 1.40 1.45 0.053 0.055 0.057 b 0.30 0.37 0.45 0.012 0.015 0.018 c 0.09 0.20 0.004 0.008 d 9.00 0.354 d1 7.00 0.276 d3 5.60 0.220 e 0.80 0.031 e 9.00 0.354 e1 7.00 0.276 e3 5.60 0.220 l 0.45 0.60 0.75 0.018 0.024 0.030 l1 1.00 0.039 k0 o (min.), 7 o (max.) a a2 a1 b seating plane c 8 9 16 17 24 25 32 e3 d3 e1 e d1 d e 1 k b tqfp32 l l1 0.10mm .004 0060661 tqfp32 mechanical data STB5600 9/10 .com .com .com .com .com 4 .com u datasheet
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specification mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics ? 1998 stmicroelectronics printed in italy all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - france - germany - italy - japan - korea - malaysia - malta - mexico - morocco - the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. . STB5600 10/10 .com .com .com .com 4 .com u datasheet
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